UPSC Darpan

Science & TechnologyGS318 September 2026

Semicon India 2026: ISM 2.0 Draws $11-12 Billion of Investment Interest as Five of Twelve Projects Go Operational

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The news

Prime Minister Narendra Modi pitched India as a 'new and trustworthy location' for electronics manufacturing at the inauguration of the fifth Semicon India summit, urging global chipmakers to consider the country's potential to relieve electronics from the 'weaponisation' of supply chains. 'This is not a sector where you set up a factory and the job is done,' he said, adding that wherever semiconductor ecosystems have been built in the world, the entire ecosystem has come together only after decades of hard work. Five of the twelve projects sanctioned under the first phase of the ₹76,000-crore India Semiconductor Mission are operational now; semiconductor assembly, testing, marking and packaging units of Micron Technology, Kaynes Semicon and CG Semi began commercial production earlier this year. IT Minister Ashwini Vaishnaw said the government has seen investment interest of about $11-12 billion from companies as part of ISM 2.0, that close to one lakh new employment will be created in the entire ecosystem, and that the government is committed to training more than one lakh technicians over the coming five years for different electronics manufacturing duties. The Prime Minister's address came days after ISM's second phase, with an outlay of ₹1.27 lakh crore, was notified. Global industry body SEMI's CEO Ajit Manocha estimated that the semiconductor industry would cross $1.3 trillion this year and $2 trillion by 2030. Micron CEO Sanjay Mehrotra said current production capacity already exceeds the memory required for India's entire laptop market. Infineon CEO Jochen Hanebeck called India 'a market of tremendous importance'. The Indian Express reported that India spent almost $150 billion on semiconductor product imports between FY17 and FY25, that imports grew at a compound annual growth rate of 23% during this period, and that if the trend continues annual imports could reach $240 billion by 2035. Per PIB, the summit ran from September 17-19 at Yashobhoomi, New Delhi, on the theme 'Silicon to Systems: Building the Ecosystem', with design tools provided to 332 academic institutes, support extended to 105 start-ups and 24 start-ups approved under the Design Linked Incentive scheme. The Economic Times reported that PM Modi launched chip packaging facilities of Suchi Semicon in Gujarat and CDIL in Punjab, and that Tata Electronics announced seven partnerships around its chip fab in Gujarat and packaging facility in Assam.

Static syllabus linkage

  1. The semiconductor value chain, in four stages. Design turns a specification into a circuit layout. Fabrication etches that design onto silicon wafers in a fab. Assembly, testing, marking and packaging — ATMP, sometimes called OSAT — cuts the wafer into chips, packages and tests them. Distribution and system integration put them into products. Each stage has entirely different capital, skill and yield characteristics.
  2. Why India entered at ATMP first. A leading-edge fab costs many billions of dollars and takes years to reach commercial yield. ATMP is far less capital-intensive, employs more people per rupee invested, and can reach commercial production within a couple of years. Starting there builds an ecosystem, a workforce and supplier relationships while the harder fabrication capability is developed.
  3. What the India Semiconductor Mission is. ISM was launched under the Ministry of Electronics and Information Technology as part of the semiconductor and display fab ecosystem programme, with a first-phase outlay of ₹76,000 crore covering fabs, display fabs, compound semiconductors and ATMP units, plus the Design Linked Incentive scheme for domestic design firms. Its second phase carries an outlay of ₹1.27 lakh crore.
  4. 'Weaponisation' of supply chains, explained. It refers to using control over a critical input as leverage — restricting export of chips, equipment or materials to influence another state's behaviour. Export controls on advanced chips and chipmaking equipment, and the rare-earth controls covered elsewhere in this digest, are the same instrument applied to different links of the chain.

Why UPSC loves this

  1. Semiconductors sit at the centre of technology and trade questions. The topic serves GS3 questions on indigenisation and industrial policy, and GS2 questions on technology-led geopolitics. Few topics cover that much syllabus at once.
  2. The exam rewards knowing where India actually is. Generic answers assert that India is becoming a chip hub. A precise answer distinguishes packaging units in commercial production from fabrication capability still being built — that distinction is exactly what an examiner is testing.
  3. The import trajectory gives the argument its urgency. Almost $150 billion of semiconductor imports across FY17-FY25 growing at 23% a year, potentially reaching $240 billion annually by 2035, is the strategic case for domestic capacity stated as arithmetic rather than aspiration.

Prelims nuggets

  • The India Semiconductor Mission operates under the Ministry of Electronics and Information Technology; the first phase carried an outlay of ₹76,000 crore and the second phase ₹1.27 lakh crore.
  • ATMP stands for assembly, testing, marking and packaging — the back-end stage of chip manufacturing, also referred to as OSAT (outsourced semiconductor assembly and test).
  • The Design Linked Incentive scheme supports domestic semiconductor design companies with financial incentives and access to electronic design automation tools.
  • Semiconductor fabrication requires ultra-pure silicon wafers, photolithography, and extremely high-purity water and gases; extreme ultraviolet lithography equipment is produced commercially by a single company, ASML of the Netherlands.
  • Compound semiconductors such as gallium nitride and silicon carbide are used in power electronics, electric vehicles and radio-frequency applications, and form a distinct category under ISM.

Analysis

  1. Five of twelve operational is real progress and an incomplete story. Micron, Kaynes Semicon and CG Semi are in commercial production, which means India now genuinely packages chips at commercial scale rather than merely announcing intentions. But the operational units are at the back end of the chain. Fabrication — turning designs into wafers — remains the capability India does not yet have at scale, and it is the one that determines whether the country is a manufacturing location or a strategic supplier. An answer should state both facts in the same breath.
  2. The Prime Minister's own framing is the most candid part. The remark that ecosystems have come together only after decades of hard work is an unusually realistic statement from a policy launch event. Taiwan and South Korea took thirty to forty years, with sustained state support through multiple loss-making cycles. Set against that, India is three to four years into a first phase. The honest metric for ISM is not output today but whether policy support survives the first serious downturn.
  3. Trust is the product India is actually selling. The pitch as a 'trustworthy location' relieving electronics from supply-chain weaponisation is not a claim about cost or technology. It is a claim about political risk: that a customer's supply will not be interrupted for reasons unrelated to the contract. That is a real differentiator in a world of export controls, and it is the one advantage India can offer before it has cost or yield advantages.
  4. The import arithmetic is the strongest case for the subsidy. Nearly $150 billion spent on semiconductor imports across FY17-FY25, growing at 23% annually towards a possible $240 billion a year by 2035, means the outlay is being weighed against a rapidly compounding import bill. If domestic capacity displaces even a modest fraction of that, the fiscal case works. If it does not, ₹2 lakh crore across two phases will have bought packaging capacity and employment but not import substitution — and both outcomes remain open at this stage.
  5. One lakh technicians is the constraint nobody photographs. The commitment to train over one lakh technicians over five years addresses the real bottleneck. Semiconductor manufacturing needs process technicians, equipment maintenance engineers, cleanroom operators and metrology specialists — roles that require specific vocational training rather than general engineering degrees. Fabs have been delayed worldwide by workforce shortages, not by capital. Design tools at 332 institutes and 24 DLI-approved start-ups build the design layer, but the manufacturing workforce is a separate and harder pipeline.
  6. Geographic spread is a political choice with a technical cost. Packaging in Gujarat and Punjab, a fab in Gujarat, packaging in Assam, units in Odisha. Distributing units builds constituencies for continued support and spreads employment. It also disperses the supplier ecosystem, specialised labour pool and logistics that clustering normally provides — which is precisely what made Hsinchu and Suwon work. The trade-off is defensible, but it is a trade-off and should be named as one.
  7. Investment interest is not investment. The figure of $11-12 billion is stated as interest expressed by companies under ISM 2.0, not as committed or deployed capital. The distinction matters because semiconductor announcements have a long history globally of not converting. The metric worth tracking is not announcements at successive summits but units reaching qualified commercial yield — which is the number that will settle whether ISM succeeded.

Possible Mains question

"India's semiconductor strategy has succeeded in building back-end capacity while the strategically decisive capability — fabrication — remains a work in progress." Critically examine India's approach, and evaluate whether the scale of public support is justified.

Model approach

  1. Introduction — map the value chain. Open by distinguishing design, fabrication, ATMP and system integration, and state where India currently sits: commercial production at the packaging stage, with fabrication still being built.
  2. Body 1 — explain why entering at ATMP was rational. Cover lower capital intensity, faster time to commercial production, higher employment per rupee, and ecosystem-building effects, while noting that this is the lowest value-added stage.
  3. Body 2 — set out the strategic rationale. Use the import arithmetic — nearly $150 billion over FY17-FY25, 23% CAGR, a potential $240 billion a year by 2035 — and the supply-chain weaponisation argument to justify state support.
  4. Body 3 — identify the binding constraints. Discuss workforce, particularly the technician pipeline, the ultra-pure water, power reliability and logistics requirements of fabs, and the difficulty of achieving commercial yield.
  5. Body 4 — assess the design choices critically. Examine geographic dispersal against the benefits of clustering, and distinguish investment interest from committed capital, arguing that the right success metric is qualified commercial output rather than announcements.
  6. Conclusion — judge it on persistence. Conclude that semiconductor ecosystems everywhere took decades of sustained support through loss-making cycles, so the test of India's strategy is not current output but whether policy commitment and skilling investment persist beyond the announcement phase.

Administrator's brainstorm

As a MeitY official, how would you define success for ISM 2.0 so that it cannot be met by announcements alone?

Replace announcement-based reporting with output-based reporting, and publish the definition in advance so it cannot be adjusted later. The headline metric should be volume of chips shipped at qualified commercial yield from Indian units, because that single number cannot be met by a groundbreaking ceremony. Add capital actually deployed against capital committed, since the gap between the two is where such programmes quietly fail. Add trained technicians placed in operating units, not merely enrolled in courses. Add import substitution measured in dollars for the specific chip categories India now produces, because that is the stated strategic rationale and it should be tested rather than assumed. And publish a project-level dashboard with each unit's stage, since aggregate numbers allow a single large success to mask several stalled projects.

You are asked whether the next tranche of support should go to another packaging unit or to strengthening the technician pipeline. How do you decide?

Ask which one the other cannot proceed without. Packaging capacity that stands idle for want of process technicians and equipment maintenance engineers is a stranded asset, while trained technicians in an economy with insufficient capacity will find employment abroad and be recoverable later — so the asymmetry favours skilling when the pipeline is the binding constraint. Establish which it is empirically rather than by assumption: ask operating units what their current vacancy rate is by role and how long positions stay open, because that figure settles the question faster than any projection. If the shortage is real, fund the pipeline through arrangements tied to operating units — apprenticeships inside working fabs and packaging plants rather than classroom programmes, since semiconductor process skills are learned on qualified equipment. And structure support so a unit receiving capital incentives has a training obligation attached, which makes the two decisions one decision rather than a choice between them.