Science & TechnologyGS323 September 2026
AI Data-Centre Boom Drives a Memory-Chip ‘Supercycle’ While India Stays in Packaging and Design
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The news
New Delhi. Semicon India, the flagship conference of the India Semiconductor Mission (ISM) under the IT Ministry, was held in New Delhi last week amid exceptional AI-driven demand for chips, writes Shruti Mittal of Carnegie India in The Indian Express. Some call this a semiconductor “supercycle” — a multi-year boom in investment caused by a fundamental technology shift, as with computers in the 1990s and smartphones in the 2010s. The demand comes largely from AI data centres, buildings full of servers whose key part is the AI chip, or accelerator, that runs the massive calculations of AI models. Such a processor is only as fast as the data fed to it, and ordinary memory sits too far away. High-bandwidth memory (HBM) solves this by stacking layers of working memory close to the processor, joined using advanced packaging — not the box, but the engineering that connects chips to each other. Three firms dominate HBM: South Korea’s SK Hynix and Samsung, and Micron of the United States. Citing S&P Global, the article says Microsoft, Amazon, Google and Meta plan to spend nearly $635 billion on AI infrastructure in 2026 alone. Chipmakers are signing long-term “take-or-pay” contracts, under which buyers must take the agreed chips whatever their current demand or pay heavy penalties. Ms. Mittal cautions that this spending is concentrated in a few firms. India does not produce chips: under ISM 1.0 it approved 12 projects and some packaging units have begun production, and Micron’s Sanand plant in Gujarat will process imported wafers. A July parliamentary reply said AI demand was tightening memory supply and raising prices, and some foreign investment withdrawals in 2026 have been linked to Taiwan and South Korea. ISM 2.0, launched in February, supports packaging and, through a separate scheme, research on chiplets — small specialised chips combined in place of one large piece of silicon. Nearly a fifth of the global chip workforce is in India; under the design-linked incentive scheme, startup Netrasemi is building edge-AI processors for cameras and drones, and Infineon has acquired the Bengaluru fabless firm C2i. Separately, The Hindu (AFP) reports that at a September 21 event on the UN General Assembly sidelines, members of the UN’s International Scientific Panel on AI, created in 2025, warned against “investing in fear”. The syllabus link is GS3 on science and technology and indigenisation of technology.
The chain in one line: Generative AI models need vast computation → big technology firms pour nearly $635 billion into AI data centres in 2026 → accelerators need memory placed right beside them, so demand for HBM and advanced packaging soars and chipmakers lock in take-or-pay contracts → memory supply tightens, prices rise and investors chase Taiwan and Korea → India, strong in design talent and building assembly and packaging under ISM 1.0 and 2.0, is still outside the most profitable layer of the chain
Static syllabus linkage
- A chip passes through three stages, and India so far works in the first and the last. The semiconductor value chain has three broad stages: design, in which engineers plan the circuit using electronic design automation software and licensed intellectual property; fabrication, in which the circuit is printed on silicon wafers in a “fab” or foundry; and assembly, testing, marking and packaging (ATMP), also called outsourced semiconductor assembly and test (OSAT), in which the finished wafer is cut, packaged and tested. A “fabless” company designs and sells chips but outsources manufacturing, a “foundry” manufactures for others, and an integrated device manufacturer does both. Fabrication is the most capital-intensive stage, requiring billions of dollars and advanced equipment. India has long had a deep chip-design workforce, largely working for global firms, and is now adding ATMP and OSAT capacity.
- High-bandwidth memory is a stack of DRAM chips built beside the processor. Computers use two main kinds of memory: DRAM, the fast “working memory” that holds data while it is being processed and loses it when power is switched off, and NAND flash, which stores data permanently. HBM is made by stacking several DRAM dies vertically and linking them with tiny vertical connections called through-silicon vias. The stack is then placed next to the processor on a thin base layer called an interposer, an arrangement often described as 2.5D packaging. The short distance and very wide connection allow far more data per second than conventional memory, which is why HBM has become essential for AI accelerators.
- Chiplets break one big chip into smaller specialised ones joined by packaging. A conventional chip is built as one piece of silicon, called a monolithic die; as dies grow larger, a single defect can spoil the whole chip, raising cost and waste. The chiplet approach splits the design into smaller dies, each made on the process best suited to it, and joins them in one package. This makes advanced packaging, rather than only smaller transistors, a source of performance gains, which matters as the pace predicted by Moore’s Law slows. An industry standard for connecting chiplets from different makers, Universal Chiplet Interconnect Express (UCIe), was launched in 2022.
- The Semicon India programme and the India Semiconductor Mission. The Union Cabinet approved the Semicon India programme in December 2021 with an outlay of ₹76,000 crore to develop a semiconductor and display manufacturing ecosystem. The India Semiconductor Mission, a specialised unit under the Digital India Corporation of the Ministry of Electronics and Information Technology, runs it. The programme has schemes for semiconductor fabs, display fabs, compound semiconductors and ATMP/OSAT units, and the Design Linked Incentive (DLI) scheme, which supports domestic chip-design firms and startups with financial incentives and design infrastructure. Separately, the IndiaAI Mission was approved in March 2024 to build compute capacity, datasets and AI applications.
Why UPSC loves this
- GS3 covers indigenisation of technology and investment in industry. UPSC has asked about India’s semiconductor ambitions, the obstacles to building fabs, and the role of design versus manufacturing. This article gives the vocabulary — supercycle, HBM, chiplets, take-or-pay, fabless — and a clear-eyed picture of where India stands in the chain, which is more useful than any single investment announcement.
- Global AI governance is entering GS2 international institutions. Questions on the governance of emerging technologies, AI and data have appeared in both GS2 and GS3. The UN’s International Scientific Panel on AI, created in 2025, is a new institution a Prelims statement question could test, along with India’s role in the AI summit series and its own IndiaAI safety agenda.
- Economic geography of technology is a GS1 and essay theme. The concentration of HBM in three firms and of advanced packaging in East Asia is a lesson in the geography of strategic industries. Essay topics on technology and sovereignty, and GS1 questions on the location of industries, can draw on how a single technological shift redistributes investment between countries.
Prelims nuggets
- High-bandwidth memory (HBM) is made by stacking DRAM dies vertically and placing the stack close to the processor using advanced packaging.
- DRAM is volatile working memory that loses data when power is switched off, while NAND flash is non-volatile storage memory.
- A fabless semiconductor company designs and sells chips but outsources their fabrication to foundries.
- ATMP stands for assembly, testing, marking and packaging, the back-end stage of semiconductor manufacturing that follows wafer fabrication.
- The Semicon India programme, approved in December 2021 with an outlay of ₹76,000 crore, is implemented through the India Semiconductor Mission under the Ministry of Electronics and Information Technology.
- The Design Linked Incentive scheme under the Semicon India programme supports domestic companies and startups engaged in semiconductor design.
- Chiplet architecture combines multiple smaller dies within a single package instead of building one large monolithic die.
Analysis
- India is riding the supercycle at its lowest-margin stage, and that is a reasonable place to start. In a boom, profits collect where supply is scarcest, and today that is HBM and advanced packaging controlled by a handful of firms in Korea, Taiwan and the United States. India’s packaging plants, processing imported wafers, will earn service fees rather than the rents of scarcity. Critics see this as low-value assembly dressed up as a chip industry. But packaging is no longer simple back-end work: with HBM and chiplets, the package is where performance is won, and ISM 2.0’s packaging and chiplet R&D schemes point India towards the part of the back end that is becoming high-value. The test is whether Indian plants move from conventional packaging to advanced packaging within this cycle, not whether India builds a leading-edge fab.
- A supercycle is also a trap for late entrants. Supercycles end, and semiconductors have a long history of booms followed by gluts and price crashes. Take-or-pay contracts protect today’s leaders, who can plan capacity against guaranteed buyers, while new entrants build plants that may come on stream after demand has peaked. Ms. Mittal’s warning that the industry depends on the revenue AI services actually earn is the key risk: if AI spending by four firms slows, memory prices can fall sharply. India should therefore invest where its advantage lasts through the cycle — design talent and packaging skills — rather than chase the most cyclical capacity at the top of the market.
- The boom already costs India something, through prices and capital. The July parliamentary reply noting that AI demand is tightening memory supply and raising prices shows that India, a large importer of electronics, pays for the supercycle through costlier devices and servers, including those needed for its own AI mission. The foreign portfolio outflows linked to Taiwan and Korea show capital chasing the cycle’s winners. This is the capital side of the four factors of production: the supercycle is reallocating global investment towards countries that hold scarce semiconductor capacity. The counter-view is that such flows are cyclical and will reverse; but a country without a stake in the cycle’s scarce layer will keep facing the same pattern each time.
- Design is India’s strongest card, but ownership of design is the gap. Nearly a fifth of the global chip workforce is in India, but much of that talent designs chips owned by foreign companies. The DLI scheme and startups such as Netrasemi, building edge-AI processors for cameras and drones, are attempts to create Indian-owned intellectual property. Infineon’s acquisition of the Bengaluru fabless firm C2i cuts both ways: it validates Indian design capability, but also shows how successful Indian design firms can end up in foreign hands. A policy that funds startups without a path to scale may end up training acquisition targets, which is not a failure, but is not sovereignty either.
- The UN panel’s call for evidence is also India’s best position in AI governance. At the September 21 event, Google DeepMind’s Joelle Barral said that “investing in fear is not that helpful”, and panel co-chair Yoshua Bengio stressed separating what is known about AI risks from what can only be “plausibly extrapolated”, even as some former AI lab employees have spoken of catastrophic risk and PauseAI UK protested outside Downing Street. An evidence-first approach suits India, which wants AI adopted widely for development and fears that rules written around speculative existential risk could lock in the advantage of a few frontier labs. The counter-view is that waiting for evidence of catastrophic harm may be waiting too long. India’s credible middle path is to build its own testing and safety capacity, so that it contributes evidence rather than only consuming others’ conclusions.
Possible Mains question
“The AI-driven semiconductor supercycle is redistributing capital and capability across the world.” In this context, assess India’s position in the global semiconductor value chain and suggest how it can move into higher-value segments such as advanced packaging and chip design. (15 marks, 250 words)
Model approach
- Introduction. Define a supercycle as a multi-year investment boom caused by a structural technology shift, as with computers in the 1990s and smartphones in the 2010s. Note that AI data centres, with about $635 billion planned by four firms in 2026, are driving demand for accelerators and high-bandwidth memory.
- Body — how the value chain is changing. Explain HBM and chiplets in simple terms and show that advanced packaging has become a source of value. Mention the concentration of HBM in SK Hynix, Samsung and Micron, and take-or-pay contracts that favour incumbents.
- Body — India’s position. Describe the Semicon India programme and ISM 1.0 with 12 approved projects, focused on ATMP/OSAT; Micron’s Sanand unit processing imported wafers; the design workforce; and the DLI scheme. Note the costs: tighter memory supply, higher prices, and portfolio outflows towards Taiwan and Korea.
- Body — moving up. Suggest a shift from conventional to advanced packaging under ISM 2.0, chiplet R&D, Indian-owned design IP, retention of design startups through patient capital, skills in materials and equipment, and partnerships with trusted countries. Warn against building cyclical capacity at the peak of a boom.
- Conclusion. Conclude that India should aim to be indispensable in a few segments — design and advanced packaging — rather than present in all, so that the next cycle finds it holding scarce capability.
Administrator's brainstorm
As a Joint Secretary in MeitY handling ISM 2.0, how would you decide between subsidising another conventional packaging plant and funding chiplet research?
I would look at where India can be scarce rather than simply present. Conventional packaging capacity is growing worldwide and earns thin margins, while advanced packaging and chiplet integration are the bottlenecks of the AI cycle. I would tie support for any new plant to a roadmap towards advanced packaging, and fund chiplet research through consortia of industry and academic institutions with clear milestones. Public money should buy capability that lasts beyond the current boom.
As an officer in the Department of Economic Affairs, how would you respond to portfolio outflows linked to the chip boom in Taiwan and Korea?
I would treat such outflows as a signal about sectoral opportunity rather than a verdict on India’s macro stability. Short-term capital follows the cycle, and India cannot and should not try to stop it with controls. The durable response is to make India an investable destination in the same sectors, through stable policy, faster approvals and a pipeline of listed technology firms. Meanwhile, adequate foreign exchange reserves and a flexible exchange rate absorb the volatility.
An interview board asks: should India support a global pause on advanced AI development, as some protesters demand?
A pause is hard to verify and would mainly freeze the lead of those already at the frontier, while countries like India still need AI for health, agriculture and governance. At the same time, concerns about serious risks are not baseless and deserve scientific study, which is why the UN’s International Scientific Panel on AI matters. India’s better course is to build its own capacity to test models, participate in international scientific assessment, and support rules proportionate to evidence. Governance should follow knowledge, and India should help produce that knowledge.